The present invention relates to a semiconductor device including a capacitance portion composed of two conductive layers and a capacitance insulating film interposed therebetween, and also relates to a manufacturing method thereof.
Examples of conventionally known semiconductor devices including a capacitance portion, composed of two conductive layers and a capacitance insulating film interposed therebetween, in the semiconductor element thereof, include: a MOS transistor including a capacitance portion composed of a semiconductor substrate, a gate electrode and a gate insulating film; a dynamic RAM (Random Access Memory) including a memory capacitance portion composed of a storage node, a cell plate, and a capacitance insulating film; a floating-gate EEPROM (Electrically Erasable and Programmable Read Only Memory) including a memory capacitance portion composed of a floating gate, a control gate, and a capacitance insulating film; and a capacitance element provided in an analog circuit.
FIG. 11 is a cross-sectional view of a conventional floating-gate EEPROM. As shown in the drawing, a tunnel insulating film 110, a floating gate electrode 111, a capacitance insulating film 112, and a control gate electrode 113 are provided on a semiconductor substrate 101. In the semiconductor substrate 101, a source region 108 and a drain region 109 are formed to be self-aligned with the floating gate electrode 111 and the overlying components identified above. The floating gate electrode 111, the capacitance insulating film 112, and the control gate electrode 113 constitute a capacitive coupling portion. The capacitive coupling portion has the function of causing the injection of electrons into the floating gate electrode 111 having its capacitance coupled with the capacitance of the control gate electrode 113 or the withdrawal of electrons therefrom by the application of a control voltage to the control electrode 113.
In a semiconductor device including such a capacitance portion having a capacitance insulating film, a single-layer silicon oxide film, a silicon nitride film with a high dielectric constant, or the like is used as the capacitance insulating film. The capacitance insulating film 112 shown in FIG. 11 is typically an insulating film containing silicon nitride such as a silicon-nitride/silicon-oxide two-layer film (ON film) and a silicon-oxide/silicon-nitride/silicon-oxide three-layer film (ONO film). An oxynitride film has also been employed in a MOS transistor in particular.
On the other hand, the two conductive layers are normally two high-melting-point polysilicon films. For example, the floating gate electrode 111 and the control electrode 113 of the EEPROM shown in FIG. 11 are typically composed of polysilicon.
In recent years, as higher integration has been achieved in a semiconductor integrated circuit, further miniaturization and reduction of an operating voltage have been required for semiconductor devices including the above-mentioned capacitance portion. Lately, there has been an increasing demand for a semiconductor device with a capacitance portion having a typical size of 0.5 .mu.m (half-micron) or less. Consequently, each of the gate electrodes 111 and 112 shown in FIG. 11 tends to have a further reduced gate length.
However, if the lateral sizes of conductive layers overlying and underlying an electrostatic capacitance portion in a semiconductor device with a half-micron or smaller capacitance portion or the lateral sizes of the floating gate electrode and the control gate electrode in a floating-gate semiconductor memory device are adjusted at 0.5 .mu.m or less, then the thickness of the capacitance insulating film 112 shown in FIG. 11 is likely to be nonuniform and have a larger thickness at both end portions thereof. The electrostatic capacitance between the floating gate electrode 111 and the control gate electrode 113 is reduced accordingly, which makes it difficult to provide a specified value of capacitance necessary to secure inherent properties. Such a nonuniform film thickness may be caused as follows.
Normally, the floating gate electrode 111, the capacitance insulating film 112 and the control gate electrode 113, which have been formed by patterning, are used as a mask, thereby implanting impurity ions into the semiconductor substrate 101 to form the source and drain regions 108 and 109. After the ion implantation, a heat treatment is performed in an oxidizing atmosphere at a high temperature of 800.degree. C. to 1000.degree. C. to activate the implanted impurity and thereby generate carriers. However, the heat treatment causes the phenomenon of the increased thickness at both ends of the capacitance insulating film 112. Specifically, when the capacitance insulating film 112 interposed between the control gate electrode 113 as the upper conductive layer and the floating gate electrode 111 as the lower conductive layer is oxidized rapidly from both side faces thereof in a half-micron or smaller capacitance portion, the capacitance insulating film 112 has remarkably different thicknesses at the central and peripheral portions thereof.
As a result of experiments, the present inventors found that oxidization is accelerated rapidly when each of the electrodes 111 and 113 is composed of polysilicon having a size of 0.4 .mu.m or less in the lateral or channel longitudinal direction. This may be attributed to the phenomenon of accelerated oxidization of the polysilicon films interposing the capacitance insulating film.
Thus, as a voltage applied to the control gate electrode 113 has been further reduced, it has become more and more difficult to secure a required capacitive coupling ratio for conventional floating-gate semiconductor memory devices. As a result, numerous problems, like deterioration of device characteristics, have been caused. For example, write/erase speed and the amount of read current are adversely decreased. Moreover, other types of semiconductor devices are also highly likely to cause various deficiencies in the characteristics thereof because of the deterioration in capacitance value of the capacitance portion thereof.